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1 May 2003

Volume 93, Issue 9, pp. 4955-5841

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Frontiers of silicon-on-insulator

G. K. Celler and Sorin Cristoloveanu

J. Appl. Phys. 93, 4955 (2003); http://dx.doi.org/10.1063/1.1558223 (24 pages) | Cited 183 times

Online Publication Date: 16 April 2003

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Silicon-on-insulator (SOI) wafers are precisely engineered multilayer semiconductor/dielectric structures that provide new functionality for advanced Si devices. After more than three decades of materials research and device studies, SOI wafers have entered into the mainstream of semiconductor electronics. SOI technology offers significant advantages in design, fabrication, and performance of many semiconductor circuits. It also improves prospects for extending Si devices into the nanometer region (<10 nm channel length). In this article, we discuss methods of forming SOI wafers, their physical properties, and the latest improvements in controlling the structure parameters. We also describe devices that take advantage of SOI, and consider their electrical characteristics. © 2003 American Institute of Physics.
Show PACS
85.40.-e Microelectronics: LSI, VLSI, ULSI; integrated circuit fabrication technology
85.30.Tv Field effect devices
73.40.Qv Metal-insulator-semiconductor structures (including semiconductor-to-insulator)
01.30.Rr Surveys and tutorial papers; resource letters
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