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Journal of Applied Physics / Volume 111 / Issue 7 / ARTICLES / Device Physics

J. Appl. Phys. 111, 074507 (2012); http://dx.doi.org/10.1063/1.3701581 (9 pages)

Resistive switching in silicon suboxide films

Adnan Mehonic1, Sébastien Cueff2, Maciej Wojdak1, Stephen Hudziak1, Olivier Jambois3, Christophe Labbé2, Blas Garrido3, Richard Rizk2, and Anthony J. Kenyon1

1Department of Electronic & Electrical Engineering, UCL, Torrington Place, London WC1E 7JE, United Kingdom
2CIMAP, UMR CNRS 6252 ENSICAEN, 6 Boulevard Maréchal Juin, 14050 Caen Cedex 4, France
3MIND-IN2UB, Department Electrònica, Universitat de Barcelona, Martí i Franquès 1, 08028, Barcelona, CAT, Spain

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(Received 16 December 2011; accepted 27 February 2012; published online 6 April 2012)

We report a study of resistive switching in a silicon-based memristor/resistive RAM (RRAM) device in which the active layer is silicon-rich silica. The resistive switching phenomenon is an intrinsic property of the silicon-rich oxide layer and does not depend on the diffusion of metallic ions to form conductive paths. In contrast to other work in the literature, switching occurs in ambient conditions, and is not limited to the surface of the active material. We propose a switching mechanism driven by competing field-driven formation and current-driven destruction of filamentary conductive pathways. We demonstrate that conduction is dominated by trap assisted tunneling through noncontinuous conduction paths consisting of silicon nanoinclusions in a highly nonstoichiometric suboxide phase. We hypothesize that such nanoinclusions nucleate preferentially at internal grain boundaries in nanostructured films. Switching exhibits the pinched hysteresis I/V loop characteristic of memristive systems, and on/off resistance ratios of 104:1 or higher can be easily achieved. Scanning tunneling microscopy suggests that switchable conductive pathways are 10 nm in diameter or smaller. Programming currents can be as low as 2 μA, and transition times are on the nanosecond scale.

© 2012 American Institute of Physics

Article Outline

  1. INTRODUCTION
  2. EXPERIMENTAL DETAILS
  3. RESULTS AND DISCUSSION
    1. Current–voltage characteristics
    2. Current–time characteristics
    3. Impedance spectroscopy and conduction mechanism
    4. Scanning tunneling microscopy and atomic force microscopy
    5. Switching model
  4. CONCLUSION

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KEYWORDS, PACS, and IPC

Keywords

diffusion, electrical conductivity transitions, elemental semiconductors, grain boundaries, hysteresis, memristors, nanostructured materials, nucleation, random-access storage, scanning tunnelling microscopy, silicon, silicon compounds, stoichiometry, thin films, tunnelling

PACS

  • 84.32.Ff

    Conductors, resistors (including thermistors, varistors, and photoresistors)

  • 84.30.Sk

    Pulse and digital circuits

International Patent Classification (IPC)

  • B82B1/00

    Nano-structures

  • H01C

    Resistors

  • H04N5/907

    Using static stores, e.g. storage tubes, semiconductor memories

ARTICLE DATA

Digital Object Identifier
http://dx.doi.org/10.1063/1.3701581

PUBLICATION DATA

ISSN

0021-8979 (print)  
1089-7550 (online)

Publisher

$abstract.society.value is a Member of CrossRef American Institute of Physics

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    References

    F. El Kamel, P. Gonon, C. Vallee, V. Jousseaume, and H. Grampeix, Appl. Phys. Lett. 98(2), 023504 (2011)APPLAB000098000002023504000001.

    D. J. Dimaria, D. W. Dong, C. Falcony, T. N. Theis, J. R. Kirtley, J. C. Tsang, D. R. Young, F. L. Pesavento, and S. D. Brorson, J. Appl. Phys. 54(10), 5801–5827 (1983)JAPIAU000054000010005801000001.

    M. Porti, M. Avidano, M. Nafria, X. Aymerich, J. Carreras, and B. Garrido, J. Appl. Phys. 98(5), 056101 (2005)JAPIAU000098000005056101000001.

    O. Jambois, Y. Berencen, K. Hijazi, M. Wojdak, A. J. Kenyon, F. Gourbilleau, R. Rizk, and B. Garrido, J. Appl. Phys. 106(6), 063526 (2009)JAPIAU000106000006063526000001.

    L. A. Nesbit, Appl. Phys. Lett. 46(1), 38–40 (1985)APPLAB000046000001000038000001.

    S. Cueff, C. Labbe, B. Dierre, F. Fabbri, T. Sekiguchi, X. Portier, and R. Rizk, J. Appl. Phys. 108(11), 113504 (2010)JAPIAU000108000011113504000001.

    C. R. Mokry, P. J. Simpson, and A. P. Knights, J, Appl. Phys. 105(11), 114301 (2009)JAPIAU000105000011114301000001.

    A. Sarikov, V. Litovchenko, I. Lisovskyy, I. Maidanchuk, and S. Zlobin, Appl. Phys. Lett. 91(13), 133109 (2007)APPLAB000091000013133109000001.

    G. Bersuker, D. C. Gilmer, D. Veksler, P. Kirsch, L. Vandelli, A. Padovani, L. Larcher, K. McKenna, A. Shluger, V. Iglesias, M. Porti, and M. Nafria, J. Appl. Phys. 110, 124518 (2011)JAPIAU000110000012124518000001.

    A. X. Chu and W. B. Fowler, Phys. Rev. B 41(8), 5061–5066 (1990).


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Figures (8)

Figures (click on thumbnails to view enlargements)

FIG.1
(a) IV characteristics (125 μm × 125 μm top electrode). The black line in the positive bias shows a transition from OFF to ON state. The gray line shows a full ON state afterwards. The gray line in the negative bias shows a transition from ON to OFF state and the black line shows a full OFF state afterwards. Inset: Logarithmic representation. (b) Device schematic. (c) ON and OFF states dependence on increasing temperature. (d) Switching cycles using voltage pulses of +20, −20, and +2 V for setting, resetting and reading, respectively. (e) IV characteristics for device with poly-Si top contact (30 at. % excess Si, 37 nm thick layer, 125 μm × 125 μm contact size).

FIG.1 Download High Resolution Image (.zip file) | Export Figure to PowerPoint

FIG.2
(a) Unipolar switching for device with ITO contact (250 μm × 250 μm contact size) (b) Unipolar programming with −8 V (set), −12 V (reset), and −1 V (read), (c) IV characteristics (125 μm × 125 μm top electrode).

FIG.2 Download High Resolution Image (.zip file) | Export Figure to PowerPoint

FIG.3
(a) IV curve (in positive bias) shows three distinct levels (two set processes and competing process) (b) IV curve (in negative bias) shows three distinct levels (two reset processes and competing process).

FIG.3 Download High Resolution Image (.zip file) | Export Figure to PowerPoint

FIG.4
Current-time graphs under a constant voltage bias of (a) −8 V and (b) −10 V.

FIG.4 Download High Resolution Image (.zip file) | Export Figure to PowerPoint

FIG.5
Cole − Cole plots with equivalent circuits under 1 V in (a) OFF state and (b) ON state. Trap assisted tunneling fit in (c) ON (low resistance) state and (d) OFF (high resistance) state (Inset: Fowler-Nordheim tunneling fit in OFF state).

FIG.5 Download High Resolution Image (.zip file) | Export Figure to PowerPoint

FIG.6
(a) STM I/V curves for the edge point (b) atomic force microscopy scan of the surface top side showing surface features attributed to the tops of growth columns (c) Scanning tunneling microscopy scan of a sample surface [different area to that in (b)] showing enhanced conductivity at column edges (d) Schematic of columnar structure of switching film and switchable site.

FIG.6 Download High Resolution Image (.zip file) | Export Figure to PowerPoint

FIG.7
Schematic of one cycle process. (a) Initial OFF state before applying the electric field, showing as-grown silicon nanoinclusions nucleated at oxygen vacancy sites. (b) ON state after the chain formation, showing extra silicon nanoinclusions produced by field-driven migration of oxygen vacancies. (c) Annihilation process due to Joule heating. (d) Silicon and oxygen distribution at the weak point.

FIG.7 Download High Resolution Image (.zip file) | Export Figure to PowerPoint

FIG.8
Different positions of switching point due to depletion of oxygen vacancies close to one interface (a) high resistive state: switching point near ITO/ poly-Si–SiOx interface; (b) high resistive state: switching point near SiOx − substrate interface; (c) low resistive state.

FIG.8 Download High Resolution Image (.zip file) | Export Figure to PowerPoint



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