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J. Appl. Phys. 108, 051101 (2010); http://dx.doi.org/10.1063/1.3474652 (20 pages)

High aspect ratio silicon etch: A review

Banqiu Wu, Ajay Kumar, and Sharma Pamarthy

Applied Materials, 974 E. Arques Ave., M/S 81505 Sunnyvale, California 94085, USA

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(Received 4 November 2009; accepted 12 July 2010; published online 9 September 2010; corrected 10 September 2010)

High aspect ratio (HAR) silicon etch is reviewed, including commonly used terms, history, main applications, different technological methods, critical challenges, and main theories of the technologies. Chronologically, HAR silicon etch has been conducted using wet etch in solution, reactive ion etch (RIE) in low density plasma, single-step etch at cryogenic conditions in inductively coupled plasma (ICP) combined with RIE, time-multiplexed deep silicon etch in ICP-RIE configuration reactor, and single-step etch in high density plasma at room or near room temperature. Key specifications are HAR, high etch rate, good trench sidewall profile with smooth surface, low aspect ratio dependent etch, and low etch loading effects. Till now, time-multiplexed etch process is a popular industrial practice but the intrinsic scalloped profile of a time-multiplexed etch process, resulting from alternating between passivation and etch, poses a challenge. Previously, HAR silicon etch was an application associated primarily with microelectromechanical systems. In recent years, through-silicon-via (TSV) etch applications for three-dimensional integrated circuit stacking technology has spurred research and development of this enabling technology. This potential large scale application requires HAR etch with high and stable throughput, controllable profile and surface properties, and low costs.

© 2010 American Institute of Physics

Article Outline

  1. INTRODUCTION TO HIGH ASPECT RATIO SILICON ETCH
    1. Wet etch
    2. Plasma etch
    3. Etch and passivation
    4. Microelectromechanical systems (MEMS)
    5. TSVs
    6. HAR small features for IC fabrications
    7. Challenges of HAR silicon etch
  2. TIME-MULTIPLEXED ALTERNATING PROCESS
    1. Etch rate
    2. Etch rate uniformity
    3. Selectivity
    4. Profile
    5. ARDE
    6. Loading effects
    7. Micrograss
    8. Notching
  3. STEADY-STATE ETCH PROCESSES
    1. RIE
    2. Cryogenic etching
    3. Near-room temperature high density plasma (HDP) etch
  4. ETCH METHOD AND EQUIPMENT
  5. THEORETICAL ANALYSIS
    1. Thermodynamics
    2. Kinetics
  6. CONCLUSIONS

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ISSN

0021-8979 (print)  
1089-7550 (online)

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