Strained Si, SiGe, and Ge channels for high-mobility metal-oxide-semiconductor field-effect transistors

Lee, Minjoo L.; Fitzgerald, Eugene A.; Bulsara, Mayank T.; Currie, Matthew T.; Lochtefeld, Anthony

doi:doi:10.1063/1.1819976

This article reviews the history and current progress in high-mobility strained Si, SiGe, and Ge channel metal-oxide-semiconductor field-effect transistors (MOSFETs). We start by providing a chronological overview of important milestones and discoveries that have allowed heterostructures grown on Si substrates to transition from purely academic research in the 1980’s and 1990’s to the commercial development that is taking place today. We next provide a topical review of the various types of strain-engineered MOSFETs that can be integrated onto relaxed Si_1−xGe_x, including surface-channel strained Si n- and p-MOSFETs, as well as double-heterostructure MOSFETs which combine a strained Si surface channel with a Ge-rich buried channel. In all cases, we will focus on the connections between layer structure, band structure, and MOS mobility characteristics. Although the surface and starting substrate are composed of pure Si, the use of strained Si still creates new challenges, and we shall also review the literature on short-channel device performance and process integration of strained Si. The review concludes with a global summary of the mobility enhancements available in the SiGe materials system and a discussion of implications for future technology generations.

Article Outline

INTRODUCTION
1. Overview
HISTORICAL OVERVIEW
1. Early work
2. Progress in the first half of the 1990’s—Advent of the relaxed graded buffer, early device demonstrations
3. Progress in the second half of the 1990’s—Research on MOSFETs
4. Progress on high-mobility strained-layer MOSFETs in the 21st century
BACKGROUND ON MATERIALS AND DEVICES
1. Universal mobility and motivation for implementing channel materials with higher μ_eff
  1. Universality in heterostructure MOSFETs
  2. Correlation of low-field μ_eff with short-channel I_on
2. Materials growth techniques
  1. Low-defect density Si_1−xGe_x buffer layers on Si wafers
  2. Single-channel heterostructures
  3. Dual-channel heterostructures
3. Experimental techniques for extracting μ_eff
  1. Hall measurements
  2. Ring-shaped MOSFETs
STRAINED Si n -MOSFETs
1. Conduction band of strained Si in biaxial tension
2. Long-channel ϵ-Si n -MOSFETs
  1. Effect of strain
  2. Effect of ϵ-Si thickness
  3. Deviation of experimental observation from theoretical understanding
3. Short-channel ϵ-Si n -MOSFETs
  1. Effect of extrinsic series resistance
  2. Compensation for conduction-band offset
  3. Enhanced n -type dopant diffusion in Si_1−xGe_x
  4. Effect of self-heating
STRAINED Si p -MOSFETs
1. Valence band of strained Si in biaxial tension
2. Long-channel ϵ-Si p -MOSFETs
  1. Effect of strain
  2. Effect of ϵ-Si thickness on hole μ_eff
  3. Effect of gate overdrive
  4. Effect of surface confinement on hole mobility at high gate overdrive
  5. Strategies for preserving mobility enhancement at high gate overdrive
3. Short-channel ϵ-Si p -MOSFETs
STRAINED SILICON PROCESS INTEGRATION
1. High-quality wafer manufacturing
2. Impact of misfit dislocation nucleation and partial strain relaxation
3. Silicide formation
DUAL-CHANNEL HETEROSTRUCTURE MOSFETS
1. Effect of Ge content in the buried channel
2. Effect of strain in the buried channel
3. Effect of buried-channel thickness
4. Effect of Si cap thickness
5. Summary of dual-channel p -MOSFET channel engineering variables
6. Thermal budget of dual-channel heterostructures
7. n -MOSFETs fabricated on dual-channel heterostructures
COMBINING HIGH-MOBILITY CHANNELS WITH OTHER ADVANCED MOSFET TECHNOLOGIES
1. SGOI and SSOI
2. High- κ gate dielectrics
CONCLUSIONS